The present disclosure relates to a differential amplifier circuit. In the related art, a buffer, a voltage regulator, or a circuit that generates a reference voltage includes a differential amplifier circuit including a differential pair constituted by field-effect transistors (FETs). For example, Japanese Unexamined Patent Application Publication No. 2013-126129 discloses an amplifier configured such that each of FETs constituting a differential pair has a bulk terminal (hereinafter also referred to as a “back gate”) which is supplied with a voltage corresponding to an input signal input to a gate terminal of the FET.
In a typical differential amplifier circuit, two FETs constituting a differential pair have preferably equal characteristics. In actuality, however, the characteristics of the two FETs may not be completely identical due to production variations of the FETs, temperature differences, or other factors. In this respect, the configuration disclosed in Japanese Unexamined Patent Application Publication No. 2013-126129 does not take such a characteristic mismatch between the FETs into account. Thus, it is difficult to obtain a desired output voltage, and variations may occur in an output voltage.